SPAD Figures of Merit for Photon-Counting, Photon-Timing, and Imaging Applications: A Review

Single-photon avalanche diodes (SPADs) emerged as the most suitable photodetectors for both single-photon counting and photon-timing applications. Different complementary metal-oxide-semiconductor (CMOS) devices have been reported in the literature, with quite different performance and some excelling in just few of them, but often at different operating conditions. In order to provide proper criteria for performance assessment, we present some figures of merit (FoMs) able to summarize the typical SPAD performance (i.e., photon detection efficiency, dark counting rate, afterpulsing probability, hold-off time, and timing jitter) and to identify a proper metric for SPAD comparisons, when used either as single-pixel detectors or in imaging arrays. The ultimate goal is not to define a ranking list of best-in-class detectors, but to quantitatively help the end-user to state the overall performance of different SPADs in either photon-counting, timing, or imaging applications. We review many CMOS SPADs from different research groups and companies, we compute the proposed FoMs for all them and, eventually, we provide an insight on present CMOS SPAD technologies and future trends

Planar CMOS analog SiPMs: design, modeling, and characterization

Silicon photomultipliers (SiPMs) are large area detectors consisting of an array of single-photon-sensitive microcells, which make SiPMs extremely attractive to substitute the photomultiplier tubes in many applications. We present the design, fabrication, and characterization of analog SiPMs in standard planar 0.35 μm CMOS technology, with about 1 mm × 1 mm total area and different kinds of microcells, based on single-photon avalanche diodes with 30 μm diameter reaching 21.0% fill-factor (FF), 50 μm diameter (FF = 58.3%) or 50 μm square active area with rounded corner of 5 μm radius (FF = 73.7%). We also developed the electrical SPICE model for CMOS SiPMs. Our CMOS SiPMs have 25 V breakdown voltage, in line with most commercial SiPMs and higher gain (8.8 × 106, 13.2 × 106, and 15.0 × 106, respectively). Although dark count rate density is slightly higher than state-of-the-art analog SiPMs, the proposed standard CMOS processing opens the feasibility of integration with active electronics, for switching hot pixels off, drastically reducing the overall dark count rate, or for further on-chip processing

Automotive Three-Dimensional Vision Through a Single-Photon Counting SPAD Camera

We present an optical 3-D ranging camera for automotive applications that is able to provide a centimeter depth resolution over a mbox{40}^{\circ} \times mbox{20}^{\circ} field of view up to 45 m with just 1.5 W of active illumination at 808 nm. The enabling technology we developed is based on a CMOS imager chip of 64 \times 32 pixels, each with a single-photon avalanche diode (SPAD) and three 9-bit digital counters, able to perform lock-in time-of-flight calculation of individual photons emitted by a laser illuminator, reflected by the objects in the scene, and eventually detected by the camera. Due to the SPAD single-photon sensitivity and the smart in-pixel processing, the camera provides state-of-the-art performance at both high frame rates and very low light levels without the need for scanning and with global shutter benefits. Furthermore, the CMOS process is automotive certified

Fully CMOS analog and digital SiPMs

Silicon Photomultipliers (SiPMs) are emerging single photon detectors used in many applications requiring large active area, photon-number resolving capability and immunity to magnetic fields. We present three families of analog SiPM fabricated in a reliable and cost-effective fully standard planar CMOS technology with a total photosensitive area of 1×1 mm2. These three families have different active areas with fill-factors (21%, 58.3%, 73.7%) comparable to those of commercial SiPM, which are developed in vertical (current flow) custom technologies. The peak photon detection efficiency in the near-UV tops at 38% (fill-factor included) comparable to commercial custom-process ones and dark count rate density is just a little higher than the best-in-class commercial analog SiPMs. Thanks to the CMOS processing, these new SiPMs can be integrated together with active components and electronics both within the microcell and on-chip, in order to act at the microcell level or to perform global pre-processing. We also report CMOS digital SiPMs in the same standard CMOS technology, based on microcells with digitalized processing, all integrated on-chip. This CMOS digital SiPMs has four 32×1 cells (128 microcells), each consisting of SPAD, active quenching circuit with adjustable dead time, digital control (to switch off noisy SPADs and readout position of detected photons), and fast trigger output signal. The achieved 20% fill-factor is still very good. © (2015) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only

High linearity SPAD and TDC array for TCSPC and 3D ranging applications

An array of 32x32 Single-Photon Avalanche-Diodes (SPADs) and Time-to-Digital Converters (TDCs) has been fabricated in a 0.35 mu m automotive-certified CMOS technology. The overall dimension of the chip is 9x9 mm(2). Each pixel is able to detect photons in the 300 nm - 900 nm wavelength range with a fill-factor of 3.14% and either to count them or to time stamp their arrival time. In photon-counting mode an in-pixel 6-bit counter provides photon-number-resolved intensity movies at 100 kfps, whereas in photon-timing mode the 10-bit in-pixel TDC provides time-resolved maps (Time-Correlated Single-Photon Counting measurements) or 3D depth-resolved (through direct time-of-flight technique) images and movies, with 312 ps resolution. The photodetector is a 30 mu m diameter SPAD with low Dark Count Rate (120 cps at room temperature, 3% hot-pixels) and 55% peak Photon Detection Efficiency (PDE) at 450 nm. The TDC has a 6-bit counter and a 4-bit fine interpolator, based on a Delay Locked Loop (DLL) line, which makes the TDC insensitive to process, voltage, and temperature drifts. The implemented sliding-scale technique improves linearity, giving 2% LSB DNL and 10% LSB INL. The single-shot precision is 260 ps rms, comprising SPAD, TDC and driving board jitter. Both optical and electrical crosstalk among SPADs and TDCs are negligible. 2D fast movies and 3D reconstructions with centimeter resolution are reported

High-speed integrated QKD system

Quantum key distribution (QKD) is nowadays a well established method for generating secret keys at a distance in an information-theoretic secure way, as the secrecy of QKD relies on the laws of quantum physics and not computational complexity. In order to industrialize QKD, low-cost, mass-manufactured and practical QKD setups are required. Hence, photonic and electronic integration of the sender's and receiver's respective components is currently in the spotlight. Here we present a high-speed (2.5 GHz) integrated QKD setup featuring a transmitter chip in silicon photonics allowing for high-speed modulation and accurate state preparation, as well as a polarization-independent low-loss receiver chip in aluminum borosilicate glass fabricated by the femtosecond laser micromachining technique. Our system achieves raw bit error rates, quantum bit error rates and secret key rates equivalent to a much more complex state-of-the-art setup based on discrete components

Backside illuminated wafer-to-wafer bonding single photon avalanche diode array

We present an innovative sensor chip, exploiting backside illumination of a silicon-on-insulator (SOI) wafer integrating custom single photon avalanche diodes (SPADs), flipped and wafer-bonded on a standard CMOS wafer integrating the analog front-end circuit, in-pixel digital processing and readout electronics. Two major improvements are achieved: higher pixel density and fill-factor, since these detectors are placed on the top of the corresponding smart-pixel electronics, instead of being placed side-by-side (as in planar structures); enhanced spectral sensitivity in the near-infrared, up to 1 μm wavelength, thanks to thicker active volume within the SOI detector wafer and to the backside illumination of the active area

SPAD camera for 3D ranging in safety and security

We present two different monolithic imagers in a 0.35 μm cost-effective CMOS technology, based on high performances Single Photon Avalanche Diodes (SPADs), for long-range time-of-flight (TOF) and short-range phase-resolved depth ranging. The combination of 2D and 3D information provides useful information in surveillance and automotive applications